The Wafer-Level Packaging Symposium is scheduled for February 15-17, 2022 in San Jose, CA, USA. The theme of the event is “Advanced Packaging: The Dawn of a New Era.” The development of Advanced Package Technology is undergoing a massive change because Electrical System Architects are directly driving package performance requirements. 

Addressing wafer-level packaging, 3D, and advanced manufacturing and test technologies, the Wafer-Level Packaging Symposium will be at the forefront of packaging technology evolution. The conference will feature attendees from around the globe in the heart of Silicon Valley to immerse themselves in the latest technology and business trends.

The technical committee is currently soliciting participation in the form of technical papers and presentations as well as professional development courses.  Abstracts and course outlines can be submitted via the event website and are due by September 10, 2021.

Please contact SMTA Headquarters at or +1-952-920-7682 with questions.


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